This circuit gives 14nV noise level (or 19 effective bits) over a 10mV span. Bridge reversal eliminates 1/f noise and offset drift of a low noise, non-autozeroed, bipolar amplifier. The LTC2440 is a high speed 24-bit No Latency delta sigma ADC with 5ppm INL and 5μV offset. It uses proprietary delta-sigma architecture enabling variable speed and resolution with no latency. Ten speed/resolution combinations (6.9Hz/200nVRMS to 3.5kHz/25μVRMS) are programmed through a simple serial interface. Alternatively, by tying a single pin HIGH or LOW, a fast (880Hz/2μVRMS) or ultralow noise (6.9Hz, 200nVRMS, 50/60Hz rejection) speed/resolution combination can be easily selected. The accuracy (offset, full-scale, linearity, drift) and power dissipation are independent of the speed selected. Since there is no latency, a speed/resolution change may be made between conversions with no degradation in performance.